VLSI architecture for Discrete Wavelet Transform.

VLSI architecture for Discrete Wavelet Transform.

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Title: VLSI architecture for Discrete Wavelet Transform.
Author: Grzeszczak, Aleksander.
Abstract: In this thesis, we present a new simple and efficient VLSI architecture (DWT-SA) for computing the Discrete Wavelet Transform. The proposed architecture is systolic in nature, modular and extendible to 1-D or 2-D DWT transform of any size. The DWT-SA has been designed, simulated and implemented in silicon. The following are the features of the DWT-SA architecture: (1) It has an efficient (close to 100%) hardware utilization. (2) It works with data streams of arbitrary size. (3) The design is cascadable, for computation of one, two or three dimensional DWT. (4) It requires a minimum interface circuitry on the chip for purposes of interconnecting to a standard communication bus. The DWT-SA design has been implemented using CMOS 1.2 um technology.
Date: 1995
URI: http://hdl.handle.net/10393/9908

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